This invention relates generally to digital systems and in particular to systems comprising a plurality of devices interconnected by a common bus having a bus arbiter for determining which one of the devices shall have first access to the common bus when more than one device is requesting use thereof. The devices may be processors, memories and/or input-output controllers.
Bus arbitration is generally accomplished by distributed or centralized arbitration techniques. In a distributed arbitration system each of the devices connected to the common bus comprises an arbitration network as described in a patent to Evett, U.S. Pat. No. 4,402,040 which is assigned to the same assignee as the present invention. In such a distributed arbitration system, the arbitration network in each device determines the device's priority relative to other devices based on a code generated by each device. This approach is often used in high reliability or fault-tolerant systems where single point failures cannot be tolerated. In a centralized arbitration system, a single bus arbiter determines which one of a plurality of devices will be granted access to a common bus based on assigned priority to each device. However, if one or two of the higher priority devices monopolize the bus, then lower priority devices are prevented from ever using it. Thus, there is a need for a bus arbiter that will allow all devices to have an equalized opportunity to have common bus access.